条件域
cond 为条件域,每一条可条件执行的条件指令都有4位的条件位域,2^4能表示16种条件
cond 助记符 含义(整型) 含义(浮点型) 条件标志 0000 EQ 相等 相等 Z == 1 0001 NE 不等 不等或无序 Z == 0 0010 CS 进位 大于等于或无序 C == 1 0011 CC 进位清除 小于 C == 0 0100 MI 减、负数 小于 N == 1 0101 PL 加、正数或 0 大于等于或无序 N == 0 0110 VS 溢出 无序 V == 1 0111 VC 未溢出 有序 V == 0 1000 HI 无符号大于 大于或无序 C == 1 and Z == 0 1001 LS 无符号小于或等于 小于或等于 C == 0 or Z == 1 1010 GE 有符号大于或等于 大于或等于 N == V 1011 LT 有符号小于 小于或无序 N != V 1100 GT 有符号大于 大于 Z == 0 and N ==V 1101 LE 有符号大于或等于 小于等于或无序 Z == 1 or N != V 1110 无 无条件 无条件 任何
The TakeSVCException() pseudocode procedure describes how the processor takes the exception:
// TakeSVCException()
// ==================
TakeSVCException()
// Determine return information. SPSR is to be the current CPSR, after changing the IT[]
// bits to give them the correct values for the following instruction, and LR is to be
// the current PC minus 2 for Thumb or 4 for ARM, to change the PC offsets of 4 or 8
// respectively from the address of the current instruction into the required address of
// the next instruction, the SVC instruction having size 2bytes for Thumb or 4 bytes for ARM.
ITAdvance();
new_lr_value = if CPSR.T == '1' then PC-2 else PC-4;
new_spsr_value = CPSR;
vect_offset = 8;
// Check whether to take exception to Hyp mode
// if in Hyp mode then stay in Hyp mode
take_to_hyp = (HaveVirtExt() && HaveSecurityExt() && SCR.NS == '1' && CPSR.M == '11010');
// if HCR.TGE is set to 1, take to Hyp mode through Hyp Trap vector
route_to_hyp = (HaveVirtExt() && HaveSecurityExt() && !IsSecure() && HCR.TGE == '1'
&& CPSR.M == '10000'); // User mode
// if HCR.TGE == '1' and in a Non-secure PL1 mode, the effect is UNPREDICTABLE
preferred_exceptn_return = new_lr_value;
if take_to_hyp then
EnterHypMode(new_spsr_value, preferred_exceptn_return, vect_offset);
elsif route_to_hyp then
EnterHypMode(new_spsr_value, preferred_exceptn_return, 20);
else
// Enter Supervisor ('10011') mode, and ensure Secure state if initially in Monitor
// ('10110') mode. This affects the Banked versions of various registers accessed later
// in the code.
if CPSR.M == '10110' then SCR.NS = '0';
CPSR.M = '10011';
// Write return information to registers, and make further CPSR changes: IRQs disabled,
// IT state reset, instruction set and endianness set to SCTLR-configured values.
SPSR[] = new_spsr_value;
R[14] = new_lr_value;
CPSR.I = '1';
CPSR.IT = '00000000';
CPSR.J = '0'; CPSR.T = SCTLR.TE; // TE=0: ARM, TE=1: Thumb
CPSR.E = SCTLR.EE; // EE=0: little-endian, EE=1: big-endian
// Branch to SVC vector.
BranchTo(ExcVectorBase() + vect_offset);